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العنوان
Design and Implementation of III-V TFET /
المؤلف
Abo El-Soud, Fatma Shokry Ahmed.
هيئة الاعداد
باحث / فاطمة شكري احمد ابو السعود حسين
مشرف / محمد كامل السعيد
مشرف / محمد عبد الحميد ابوالعطا
مشرف / أحمد شاكر أحمد زكي غزالة
تاريخ النشر
2022.
عدد الصفحات
81 p. :
اللغة
الإنجليزية
الدرجة
ماجستير
التخصص
الهندسة الكهربائية والالكترونية
تاريخ الإجازة
1/1/2022
مكان الإجازة
جامعة عين شمس - كلية الهندسة - هندسة الإلكترونيات والاتصالات الكهربية
الفهرس
Only 14 pages are availabe for public view

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Abstract

Recently, in electronic circuit design, scaling down conventional MOSFETs faces many issues. MOSFET scaling depends on the applied voltage as well as the device dimensions. Unfortunately, downscaling has the unintended consequence of increasing power consumption and other undesirable effects like leakage current.
Several research studies investigated MOSFETs problems and possible solutions. There have been numerous approaches introduced in the literature for CMOS device to extend Moore’s Law. A few examples are scaling down equivalent oxide thickness (EOT) with high-k gate stack, multi-gate structures and strain engineering. However, many issues are still arising in a continuous scaling of MOSFET like Short Channel Effects (SCEs), high leakage current and limitation of the subthreshold swing (SS) to 60 mV/decade at room temperature. To alleviate these limitations, new device structures should be developed to maintain scaling.
As a result, Steep Slope devices, such as Tunnel Field Effect Transistor (TFET) devices, that are based on band-to-band tunneling (BTBT), have become popular as problem-solving devices. Due to its band-to-band tunneling mechanism, TFET is a promising device with low power consumption, minimal SS, low applied voltage, and low OFF current. It does, however, have low ON current and ambipolar effects. Several studies have been carried out to increase ON current while reducing ambipolarity.
In this work, a new TFET structure will be described and examined utilizing a Ge-source, with the possibility of extending a portion of the channel into the source. Also, the concept of p+/n+ architecture is applied in this thesis for InAs for the first time and the proposed device has been investigated from DC and analog RF perspectives. For TFET structures under investigation, the impact of design parameters on ambipolar behavior, ON current, ON/OFF current ratio, as well as the cutoff frequency is provided. All simulations carried out in this study are done with SILVACO TCAD in 2D.