الفهرس 
IntroductionOnly 14 pages are availabe for public view
 |  | from | 119 |  |  |
| | | from | 119 | | |
Abstract
The advances in technology and the need for large systems of high com- puting speed and high functionality led to increasing the clock frequency and minimizing the feature size. As a result, the number of components increased and the interconnect dimensions changed: reduced cross-section area and wide interconnect. In turn, these changes in the dimensions of interconnect led to parasitics and the interconnect model changed from lumped capacitance to RC lossy model then to the accurate RCL model; and the signal integrity problems raised.
The analysis of signal integrity problems, historically, was performed in the time domain, which can not take into account the elements that have behaviors depend on frequency, accurately. Convolution simulators solved this problem, partially, by performing the IFFT of these components and convolving them with the input and other circuit elements to obtain the overall response.
80 Chapter 4. Conclusions and Future Work
It has been proposed to perform the complete analysis of signal in- tegrity in the frequency domain. In order to do so, it is required to build the correct system model, find an efficient frequency domain methodology and quantify the time domain specifications in the frequency domain and finding their signatures.
To perform a complete frequency-domain-based signal integrity analy- sis we propose in this work several models for the clock-signal aberrations in time domain such as skew, rise and fall times, ringing as well as jitter. Our approach aimed to translate the clock signal that exhibits one, or a combination, of these deviations to the frequency domain and inspect the effect of them, or their signature.
The proposed models were evaluated by building and simulating a typical digital system communication model composed of Altera’s Stratix FPGA as sender and Micron’s DDR3 as receiver connected by transmis- sion line as interconnect on Advanced Design System simulation tool pro- vided by Keysight. Both the sender and receiver are modeled by their IBIS models due to their advantages over the SPICE models in signal integrity analysis. Some changes have been made in the recommended settings, factors and configurations of that system to have some undesired effects which lead to a substantial amount of skew, reflection, ringing and jit- ter. The frequency-domain signature of the time-domain aberrations of the clock signal aberrations appeared very clear in several examples and the values of skew, undamped natural frequency, damping ratio, rise time, fall time, percentage undershoot, percentage overshoot, peak time, settling
Chapter 4. Conclusions and Future Work 81
time and the standard deviation of jitter are calculated from the frequency domain. The analysis shows that estimating clock specifications based on these models give very close results to the exact values.
4.2 Suggestions for Future Work
In order to complete the proposed idea of performing novel frequency- domain-based signal integrity analysis, the future work may include mod- eling and transforming the time-domain aberrations in the data signal to the frequency domain. These transformation might be difficult due to the random nature of the data transfered between the sender and the receiver. Some suggestions and approximations might be assumed in order to ease the modeling of these aberrations like using certain, efficient, line coding technique, for example the Non-Return to Zero (NRZ) used in the super- speed USB3 standard [62]. Another approach is to use modulation scheme, pulse amplitude modulation (PAM), for example due to the ease of gener- ation and detection. Moreover, due to random nature, it might be need to use another technique to obtain the frequency-domain signature of this, random, data rather than using Fourier series. The power spectral density is most suitable tool for such analysis.