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Abstract Chapter 1 makes an introduction to high speed serial links and its evolution across years, also contains the thesis objective and outline. Chapter 2 explains the SerDes channel impairments and effects, and introduces the concept of equalization. Chapter 3 explains the different equalizers implemented in ADC-based SerDes receivers, and the adaptive filters. Chapter 4 introduces a review for the FIR filter implementation used and introduces the new proposed FPMA-DA (Fast Parallel Multiple Access Distributed Arithmetic) reconfigurable FIR filter implementation. Chapter 5 contains the system design and the implementation of the system blocks. Chapter 6 contains the simulation results Chapter 7 concludes the thesis |