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العنوان
Automated layout constraint check for analog and mixed-signal circuits /
المؤلف
Abdelkhalek, Rana Nader Osman.
هيئة الاعداد
باحث / رنا نادر عثمان عبدالخالق السعدنى
مشرف / محمد دسوقي
مشرف / هشام عمران
تاريخ النشر
2023.
عدد الصفحات
144 p. :
اللغة
الإنجليزية
الدرجة
ماجستير
التخصص
الهندسة الكهربائية والالكترونية
تاريخ الإجازة
1/1/2023
مكان الإجازة
جامعة عين شمس - كلية الهندسة - هندسة الإلكترونيات والاتصالات الكهربائية
الفهرس
Only 14 pages are availabe for public view

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from 144

Abstract

This thesis is divided into six chapters as follows:
Chapter 1 is an introduction including the motivation for this work.
Chapter 2 is a literature overview including a survey of each proposed section.
Chapter 3 is about matching pattern and mismatch calculator describing our contribution in matching pattern, explanation of the mismatch calculator, and how we integrated them.
Chapter 4 shows reliability analysis and our technique to estimate current capability. It also presents signal isolation, showing different checks applied on interconnects.
Chapter 5 shows a test case of how the proposed tool works on complete design.
Chapter 6 is the conclusion for this work and the suggested future work.