![]() | Only 14 pages are availabe for public view |
Abstract This Thesis studies the Floating- Gate MOSFET (FGMOSFET) for its importance in biomedical engineering and many modern low-power applications. A practical DC model for FGMOSFET is highly needed to be used in circuits simulators. A mathematical model for the parasitic capacitances of FGMOSFET in linear and saturation regions of operation is introduced. Then the resultant capacitance values in drain-current equation is applied. In parallel way, a simulation technique in literature for FGMOSFET is stated. Comparison between proposed model and simulation curves are done. The output curves and characteristic curves for FGMOSFET are drawn for various biases. The model proposed is a spice model for FGMOSFET and can be inserted in any circuit simulator such as Spector and various SPICE programs (i.e. HSPICE, WinSPICE, etc.). The model is verified by using 0.13um CMOS technology and Cadence Simulator based on BSIM3 models. The model is based on n-channel FGMOSFET. The model considers velocity saturation as short channel effect and bulk charge due to drain-to-source voltage as second order effect. The model is not a charge conservative. The maximum percentage of error in linear region is 9.6% and in saturation is 2.6% |