الفهرس 
Internet of things hardware security
English SummaryOnly 14 pages are availabe for public view
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Abstract
The objective of this thesis is to provide a low area low power optimized implementation for cryptography algorithms to match the power constraints imposed by the low power IoT applications. In this thesis low area and low power implementations of selected ciphers from the CAESAR candidates namely NORX, Tiaoxin, SILC, COLM, and JAMBU are provided. Moreover, Partial dynamic reconfiguration is used to achieve resource-efficient and energy-efficient hardware security