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العنوان
Analog Integrated Design Automation \
المؤلف
Shaban, Reem ElAdawi.
هيئة الاعداد
باحث / ريم العدوى شعبان
مشرف / هانى فكرى رجائى
مشرف / محمد امين دسوقي
مناقش / هانى فكرى رجائى
تاريخ النشر
2018.
عدد الصفحات
184 p. :
اللغة
الإنجليزية
الدرجة
الدكتوراه
التخصص
الهندسة الكهربائية والالكترونية
تاريخ الإجازة
8/8/2018
مكان الإجازة
جامعة عين شمس - كلية الهندسة - هندسة الالكترونيات و الاتصالات الكهربية
الفهرس
Only 14 pages are availabe for public view

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from 184

Abstract

Circuit reliability in the presence of statistical process variation is becoming a challenging domain, as transistors sizes get smaller and smaller in the nanoscale era. It is not enough to add safety margins to designs or depend on simple assumptions about “worst case” corners. Circuits that are replicated in millions of instances on large designs such as SRAMs and flip flops face the problem that a rare event in a circuit cell may have a large impact on the system yield. Monte Carlo simulation is an ideal tool for estimation of the yield of such high replication circuit (HRCs) but not a practical one because of the high yield requirements for individual cells. Numerous techniques have been proposed to overcome this disadvantage in Monte Carlo approach. Some approaches are analytical or semi analytical that model the behavior of SRAM cell. Other statistical techniques aim to reduce the number of Monte Carlo simulations. Statistical blockade algorithm aims at detecting rare events in the tail through the classification of tail points and the fitting of GPD distribution to the tail points. In this thesis the statistical blockade method is investigated and a couple of problems are tackled and solution proposed to enhance the performance of the algorithm. The complexity problem is addressed and a subset selection algorithm is proposed. The classification method used is studied and compared to other classification methods to overcome the drawback of SVM classifier.
Thesis Outline
The thesis is divided into seven chapters including lists of contents, tables and figures as well as list of references and one appendix.
• Chapter 1: This chapter is an introduction which states the problem being tackled and the motivation for this study.
• Chapter 2: This chapter discusses rare event simulation and the challenges facing current Monte Carlo techniques in calculating yield for memory circuits. State-of-art techniques are presented.
• Chapter 3: In this chapter, an overview of subset selection techniques is discussed and an algorithm for subset selection is presented.
• Chapter 4: In this chapter, different classification techniques are discussed and the metrics used to measure the performance of a classifier are explained
• Chapter 5: This chapter discusses the use of subset selection using Lasso algorithm in reducing the complexity of the problem and the use of Random Forests and Deep Neural Networks to replace SVM classifiers.
• Chapter 6: In this chapter, the results for subset selection are presented. Also the results for replacing SVM classifiers with Random Forests and DNN are presented, compared and discussed.
• Chapter 7: This chapter concludes the work presented in this thesis, and highlights the proposed future work.