الفهرس 
MotivationOnly 14 pages are availabe for public view
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Abstract
The increasing cost of IC fabrication and the ever-shrinking transistor size forces IC Industry to move its fabrication facilities to cheaper less reliable foreign sources. SOC designers and IP producers started to adopt the trending technology of IP-Reuse to optimize the design cycle concerning its cost and time-to-market.
Reusing of IP blocks might involve the resources of untrusted third-parties and hence creating the chance of inserting malicious manipulations namely Hardware Trojans at different phases of the design cycle. These Trojans are becoming a real challenge to the IC industry. Hardware Trojans are intended manipulative inclusions that might change the infected design’s functionality and specifications, leak sensitive information about its power consumption, delay timing, area constraints, or radiation profile, or degrades its performance. Trojans threaten the authenticity of the design; they jeopardize the interests of clients who invest a lot of money to purchase creditable products.
Fragile watermarking is a process of embedding a signature that is extremely sensitive to any minor design alterations, which makes it an excellent choice to confront the malicious attacks of intentional tampering including the deceitful structures of Hardware Trojans. Yet, fragile watermarks should be robust in the sense that they are resistant to any trial of detecting or removing in order to be dependable in authenticating the IP designs.
In our thesis, we propose a behavioral fragile IP watermarking technique that coincides the signature in hierarchical finite state machines (HFSM) transitions. Our proposed watermarking tool is considered a type of HDL analysis which is a presilicon Trojan detection approach that deals with the design at the RTL abstraction level described in VHDL or Verilog codes; it targets the Trojans embedded in the state machine of the design under test in form of altered input/output functions or manipulated transitions. We propose to insert our fragile watermark in the state machine controller of the design since it visualizes the operational flow of the system and hence any Trojan inserted there, is sufficient to alter the function of the whole design.
Chapter 1
In this chapter, we clearly display the objective of our research and the motivation behind why we chose to study this topic in particular; Our motive is derived by the major threat of Hardware Trojans and their impact on threatening the authenticity and creditability of Hardware IP designs. We demonstrate a full taxonomy of different Trojan classes inserted at any phase of the design cycle and propose a Fragile Dynamic FSM Coinciding Transitions approach as an effective Hardware Trojan detection technique.
Chapter 2
This chapter presents an overview on the state-of-the-art of different FSM watermarking techniques illustrating the advantages and disadvantages of each.
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Chapter 3
We will demonstrate our fragile watermarking algorithm in form of a flowchart followed by a detailed explanation of each step within all the watermarking phases of generation, insertion, and extraction. Our tool will be tested on various examples of KISS2 files of traditional FSMs via simulations to clarify its implementation.
Chapter 4
We introduce the concept of hierarchical state machines (HSM) and clarify the modifications that were implemented on our watermarking approach presented in Chapter 3 to be applicable on more complex hierarchical designs with different concurrent and communicating modules. The flow chart of our new hierarchical watermarking design will be presented and the changed framework will be thoroughly interpreted.
Chapter 5
Different Trojan detection techniques are displayed through countermeasure taxonomy and a comparison is set up to evaluate our approach based on some important design’s constraints including delay, area, and power consumption. The sensitivity of our proposed watermarking algorithm is tested against different attack scenarios to check its robustness confronting the minimal Trojan manipulations.
Chapter 6
We will conclude our thesis and present our future work.