الفهرس 
Chapter 1: IntroductionOnly 14 pages are availabe for public view
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Abstract
Data converters are one of the major factors affecting the SDR technology. The ADC is required to perform at very high bandwidths with very high speeds and resolutions. Sigma-delta modulators are the most efficient for implementing multi-mode, multi-standard ADCs. This work proposes the application of the charge-steering concept to construct a low power opamp to be used in a sigma-delta modulator. Two sigma-delta modulators were designed using 0.18 µm TSMC CMOS technology.
The first circuit is a 2nd order, 1-bit, switched-capacitor sigma-delta modulator that achieves a SNR of 46 dB and a DR of 60 dB over a 1 MHz bandwidth. The total power consumption of the circuit is 1.3 mW at 1.2 V power supply. The second circuit is a 2nd order, dual-mode sigma-delta modulator with switchable quantizers. The circuit achieves 65/50 dB SNR over a bandwidth of 0.2/1 MHz with an over sampling ratio of 120/24 and consumes 3.7/3.6 mW of power in GSM/Bluetooth modes, respectively. In both cases, the charge-steering opamp consumes less than 40% of the total power consumption, which is an improvement to former designs.