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العنوان
Development Of Multimedia Encryption Technique Using FPGA /
المؤلف
Hammad, Amr Mohammed Riad.
هيئة الاعداد
باحث / Amr Mohammed Riad Hammad
مشرف / Atef Abou El-Azm
مناقش / Atef Abou El-Azm
مشرف / Nawal A. El-Fishawy
الموضوع
Field programmable gate arrays - Design and construction. Logic circuits - Design and construction. Data encryption (Computer science) Computer security. Multimedia systems.
تاريخ النشر
2013 .
عدد الصفحات
94 p. :
اللغة
الإنجليزية
الدرجة
ماجستير
التخصص
الهندسة الكهربائية والالكترونية
تاريخ الإجازة
1/7/2013
مكان الإجازة
جامعة المنوفية - كلية الهندسة الإلكترونية - Department of Computer Science and Engineering.
الفهرس
Only 14 pages are availabe for public view

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Abstract

Network security and data encryption have become more and more important. The images can be considered nowadays, one of the most usable forms of information. Image and video encryption have applications in various fields including Internet communication, multimedia systems, medical imaging, telemedicine and military communication. In this thesis, two approaches are introduced to improve the conventional cryptosystems to fulfill the requirements of image encryption by using IDEA (International Data Encryption Algorithm) as an example of diffusion ciphers, and the chaotic Arnold Cat Map (ACM) as an example of the permutation ciphers. The new hybrid image encryption techniques are introduced for the reduction of time consumption and increase the security features of the conventional image encryption techniques. The proposed image encryption techniques provide an efficient and secure way for image encryption. Furthermore, a VHDL (V for Very High Speed Integrated Circuit, H for Hardware, D for Description, L for Language) implementation of the second proposed algorithm presented in chapter 3 is introduced. The VHDL implementations of IDEA algorithm, Arnold’s cat map encryption and decryption algorithm are introduced. The simulation results of the proposed system are performed using Xilinx ISE 10.1. The VHDL code test and simulation is done using ModelSim. The VHDL code is downloaded onto Spartan 3E-1600 Kit. The Simulation and experimental results of the FPGA (Field Programmable Gate Array) built system are exactly the same as the Matlab results.