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Abstract Rapid development in the fields of computers and communications leads to the need for high speed processors. The continuing miniaturization of the conventional CMOS technology faces increasing technological difficulties. Therefore, alternative technologies are needed to provide the required fast processors. Technologies that contain Resonant Tunneling Diodes (RTDs) can offer a good alternative for high speed applications. In this work, a brief discussion about RTD modeling is introduced, and different models of I-V and C-V characteristics of RTD are discussed. A simple and accurate SPICE model for RTD is proposed. In addition, a straightforward parameters’ extraction routine is provided. Then, some important applications of RTD like oscillator and inverter are simulated using the proposed model. A new and effective relationship for sizing of the smart keeper, to achieve a desired I-V characteristic, is derived, verified, and used to design the smart keeper. Then, an overview and classification of the most recent noise-tolerant design techniques of dynamic logic circuits are presented and compared with the smart keeper technique. A Dual-Rail Domino full adder with the smart keeper is proposed and analyzed using the proposed model in this work. |