الفهرس 
Fundamentals of FrequencyOnly 14 pages are availabe for public view
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Abstract
This dissertation presents a complete synthesizer chain for the DVBH
standard, which is regarded as one of the most growing standards
for wireless consumer applications.
The presented frequency synthesizer presents an innovative fully integrated
solution using a newly developed low noise, wide bandwidth
LC VCO which uses a new technique for noise cancellation. This
technique can decrease the NMOS cross-coupled devices flicker noise
injection to the VCO output by 1 to 2 orders of magnitude. This tech-
nique can decrease the VCO flicker corner frequency to a maximum of
few kilohertz range using standard CMOS technology. This will also
results in a a further optimization of the synthesizer power consumption
which is a main target for a low power mobile application.
The synthesizer is targeting a wide band of frequencies covering the
VHF III band, the entire UHF band and the L-band entitled for DVBH
reception worldwide. The design is targeting a power consumption
which is lower than all published work as well as the present market
solutions.
A complete frequency synthesizer is presented . Implemented in
D.13um standard process; the synthesizer can have a phase noise of 136dBc/Hz
at 1.45MHz offset frequency with a narrow loop bandwidth
of 15Khz. The nominal power consumption is less than 30mW with a
1.2V supply. Key words: Phase Locked Loop, PLL, DVB-H, Voltage
Controlled Oscillator, Charge pump, Active Noise Isolation.